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Semiconductor Electronics

Semiconductor ElectronicsNEET Physics · Class 12 · NCERT Chapter 14

8 interactive concept widgets for Semiconductor Electronics. Drag any slider, change any number, and watch the formula and the answer update live. Built so you understand how each NEET problem actually works, not just the final number.

Energy bands and doping

Conductor / semiconductor / insulator from band gap; doping turns pure Si into n-type or p-type.

Energy bands

Energy bands in conductors, semiconductors, insulators

Toggle between the three classes; see how the band gap changes.

Solids have allowed energy bands separated by forbidden gaps. The size of the gap between the topmost filled valence band and the empty conduction band tells you whether the material conducts.

Valence band (filled)Conduction band (empty)E_g1.1 eVSi (1.1 eV), Ge (0.7 eV)

Semiconductor

Small band gap (~1 eV). Heat or light promotes electrons across.

Try this

  • Conductors have free electrons even at 0 K; resistance comes from scattering, increases with temperature.
  • Semiconductors have very few free electrons at 0 K; resistance decreases with temperature (more carriers thermally).
  • Insulators: gap > 3 eV. Diamond is technically an insulator at room T (Eg = 5.5 eV).
  • NEET shortcut: smaller Eg → easier conductivity → semiconductor / conductor.
Doping

n-type and p-type doping in semiconductors

See what happens when you replace one Si atom with a dopant.

Pure Si is a poor conductor. Adding pentavalent dopant gives n-type (extra electrons); trivalent gives p-type (extra holes).

SiSiSiSiPSiSiSiSiextra e⁻

n-type

Dopant: Pentavalent (P, As, Sb)

Majority carriers: Electrons

Minority carriers: Holes

Pentavalent dopant donates 1 extra electron (loosely bound). At room T it freely contributes to conduction.

Try this

  • Mass-action law n_e × n_h = n_i² holds in both n and p types.
  • In n-type at room T: n_e ≈ N_D (donor density). n_h = n_i² / N_D, very small.
  • Crystal stays electrically neutral overall: dopant ions balance the carrier charges.
  • Donor ions (P+) are positive; acceptor ions (B-) are negative. Both are immobile.

p-n junction and diode I-V

Bring p and n together: depletion region, biasing, and the diode I-V curve.

p-n junction

p-n junction with bias

Toggle between unbiased, forward and reverse to see how the depletion width changes.

At the p-n junction, electrons and holes recombine, leaving a thin depletion region of immobile ions. A forward bias narrows it; reverse bias widens it.

p-sidedepletionn-side

No external voltage. Built-in barrier ~0.7 V (Si) prevents net current.

Try this

  • Forward voltage = applied voltage opposing the barrier. Reduces depletion width.
  • Reverse: applied voltage adds to barrier. Widens depletion, blocks current.
  • Knee voltage: Si ≈ 0.7 V, Ge ≈ 0.3 V.
  • Breakdown happens at large reverse voltages (avalanche or Zener mechanism).
Diode I-V

p-n junction diode I-V curve

Toggle between Si and Ge to see the knee voltage shift.

Diode I-V: forward current rises sharply after the knee voltage. Reverse current is tiny until breakdown.

V (V)I (mA)V_kneeBreakdownForward (high I)

Approximation: below V_knee, I ≈ 0; above, I rises rapidly.

Try this

  • Si and Ge differ in knee: Si needs 0.7 V before serious current, Ge needs 0.3 V.
  • Reverse saturation current I_0: ~ nA for Si, ~ µA for Ge.
  • In an ideal diode model, V_knee = 0 and I = 0 for V < 0.
  • Diode dynamic resistance: r_d = ΔV / ΔI in the forward region.

Rectifiers and Zener regulator

AC to DC: half-wave, full-wave, and a Zener diode used as a regulator.

Rectifier

Half-wave and full-wave rectifier outputs

Compare the two on the same plot.

Half-wave passes only positive halves; full-wave flips the negative half too. Output frequency is the same as input for half-wave, twice for full-wave.

Input V_in (AC)Output V_out (rectified)

Output frequency

Same as input (50 Hz)

Average DC output

V_m / π

Try this

  • Half-wave: 1 diode. Output frequency = input frequency.
  • Full-wave (centre-tap): 2 diodes. Each conducts on one half-cycle.
  • Full-wave (bridge): 4 diodes. Same waveform as centre-tap, no centre tap needed.
  • Adding a capacitor filter smooths the rectified DC towards constant V_m.
Zener regulator

Zener diode voltage regulator

Set the input, Zener voltage and resistors; see when regulation works.

A Zener diode in reverse breakdown holds its voltage steady at V_Z. Use it as a simple voltage regulator: a series resistor drops the excess.

Input voltage V_in: 20 V

Zener voltage V_Z: 10 V

Series resistor R_s: 1000 Ω

Load R_L: 2000 Ω

Output V_out

10.00 V

Regulating at V_Z

I_load

5.00 mA

I_Zener

5.00 mA

Try this

  • Output voltage stays at V_Z as long as V_in > V_Z.
  • When V_in drops below V_Z, the Zener stops regulating and V_out becomes a simple voltage divider.
  • I_Z must stay above the minimum knee current for proper regulation.
  • Zener power: P = V_Z × I_Z. Pick a Zener whose rated wattage exceeds this.

Optoelectronic devices and logic gates

LED, photodiode, solar cell, and the seven basic digital logic gates.

LED, photodiode, solar cell

Optoelectronic diodes compared

Three special p-n junction diodes. Click each to see how it works.

Three optoelectronic devices, all built around a p-n junction. Click each to see how it works.

LED
Photodiode
Solar cell

LED

Biasing: Forward biased

How it works: When carriers recombine across the junction, energy is released as a photon. Wavelength corresponds to band gap E_g.

Applications: Indicator lights, displays, lighting (white LED), traffic lights.

Key formula: λ = hc / E_g

Try this

  • LED material → colour: GaAs (IR), GaP (red, green), GaN (blue), InGaN (blue-green).
  • Photodiode in reverse bias because the depletion region is biggest (most photogenerated carriers).
  • Solar cell: V_oc grows with E_g, but absorption needs photons above E_g. Trade-off.
  • White LEDs: blue LED + yellow phosphor, or RGB combinations.
Logic gates

Logic gates: truth tables and operation

Pick a gate, set inputs, see the output and the full truth table.

Click each gate to see its symbol, rule and truth table. NAND and NOR are universal: every other gate can be built from one type.

AND gate

Y = A · B

Y is high only when both A and B are high

Set inputs and see output:

A

B

Output Y

0

Truth table

A
B
Y
0
0
0
0
1
0
1
0
0
1
1
1

Try this

  • NAND with both inputs tied = NOT.
  • AND = NOT(NAND).
  • OR can be built from NANDs: A OR B = NAND(NOT A, NOT B).
  • XOR is high only when inputs differ. Useful for parity, addition.

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